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 INTEGRATED CIRCUITS
DATA SHEET
TDA9605H Audio processor with head amplifier for VHS hi-fi
Product specification File under Integrated Circuits, IC02 1999 Apr 14
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
CONTENTS 1 2 3 4 5 6 6.1 6.2 6.3 6.4 6.4.1 6.4.2 6.4.3 6.4.4 6.5 6.6 6.7 6.8 6.9 6.9.1 6.9.2 7 7.1 7.2 7.3 7.4 7.4.1 7.4.2 7.4.3 7.4.4 7.4.5 7.4.6 7.5 7.5.1 7.5.2 7.5.3 7.6 7.6.1 7.6.2 7.7 7.7.1 7.7.2 7.7.3 7.7.4 7.7.5 7.7.6 FEATURES GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Record-mute mode or head identification selection Hi-fi audio output level Reference current Head amplifier Playback mode Record-mute mode Record mode Head amplifier power supply and ground Automatic calibration Power muting Envelope output RF converter output Audio dubbing Output mix Input mix I2C-BUS PROTOCOL Addresses and data bytes Valid transmissions to and from the TDA9605H Overview of the TDA9605H I2C-bus control Control byte at subaddress 00H Audio FM mode Playback mode Record mode System standard selection Head amplifier playback amplification Head amplifier record current Select byte at subaddress 01H Decoder output select Head amplifier record current range select Normal input level Input byte at subaddress 02H Input select Normal select Output byte at subaddress 03H Line output amplification Output select Envelope output select Line output select Decoder output select RF converter mute 7.8 7.8.1 7.9 7.9.1 7.9.2 7.9.3 7.9.4 7.9.5 7.9.6 7.9.7 7.10 7.10.1 7.10.2 7.10.3 7.10.4 8 9 10 11 12 13 14 14.1 14.2 14.3 14.4 15 16 17 17.1 17.2 17.3 17.4 17.5 18 19 20
TDA9605H
Volume bytes at subaddresses 04H, 05H and 06H Left and right volume control Power byte at subaddress 07H Calibration start DC output voltage selection Test mode Power-on reset Head amplifier disable Power muting Standby select Read byte Calibration ready Auto-normal selection Calibration error Power-on reset LIMITING VALUES THERMAL CHARACTERISTICS GENERAL CHARACTERISTICS RECORD-MUTE MODE CHARACTERISTICS RECORD MODE CHARACTERISTICS PLAYBACK MODE CHARACTERISTICS APPLICATION AND TEST INFORMATION RM and HID control signals Reference current resistor Setting line output level Test modes INTERNAL CIRCUITRY PACKAGE OUTLINE SOLDERING Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS
1999 Apr 14
2
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
1 FEATURES
TDA9605H
* All functions controlled via the serial 2-wire I2C-bus * Integrated standby modes for low power consumption * Audio FM head amplifier: - Programmable recording current - Programmable playback amplification - Fast record-mute mode control input. * Hi-fi signal processing: - Adjustment free - High performance - Low distortion switching noise suppressor - NTSC and PAL (SECAM) system. * Linear audio input: - Programmable (playback) level. * 5 stereo inputs and additional mono Second Audio Program (SAP) input * 2 stereo outputs (line and decoder) with independent output select function * RF converter output with overload-protection AGC * Integrated output power muting * Audio level meter output * Extensive input and output select function * Full support of video recorder feature modes. 3 ORDERING INFORMATION TYPE NUMBER TDA9605H PACKAGE NAME QFP44 DESCRIPTION plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm VERSION SOT307-2 2 GENERAL DESCRIPTION The TDA9605H is a single-chip device in a small package that contains all the required functions, including the head amplifier, to realize the audio FM hi-fi stereo system in a VHS video recorder (see Fig.1). The device is adjustment free by use of an integrated auto-calibration system. Extensive signal select functions are offered to support pay-TV decoding and video recorder feature modes. The high performance and functionality of the TDA9605H comprises world-wide system and application requirements for NTSC, PAL, SECAM and multi-standard video recorders from basic up to high-end models.
1999 Apr 14
3
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1999 Apr 14
VCCH GNDH 40 39 PBIN1 PBIN2 37 35 RECOUT HMSW 36 38 playback. + record-mute, recording 1 2 3 4 5 6 7 8 9 10 11 E1L E1R SAP TUL TUR SAP TUNL TUNR CINL CINR EXT1L EXT1R EXT2L EXT2R AUXL AUXR
4
Philips Semiconductors
Audio processor with head amplifier for VHS hi-fi
BLOCK DIAGRAM
RMHID 41 envelope output select + playback DCL RM HID DCR
ENVOUT 44
SDA 42
SCL 43
VCC 34
GND 27
Vref 29
Iref 28
HI-FI DETECTOR AUTN DROPOUT CANCELING
I2C-BUS INTERFACE
SUPPLY
HID
HF AGC
LEVEL DETECTOR HF LIMITER
HID NOISE SUPPRESSION AUDIO CLIPPER
standby select
NOISE REDUCTION
DETECTOR W + FM RECTIFIER CCA 26 25 24 DETL DCL EMPHL DCFBL
playback head amplification, record head current RM M
1.3 or 1.4 MHz
PLL CCO (1.3 or 1.4 MHz)
5th ORDER AUDIO LPF
COMPRESSOR EXPANDER
23
HF LFP
+
LEVEL DETECTOR HF LIMITER PLL CCO (1.7 or 1.8 MHz) NOISE SUPPRESSION AUDIO CLIPPER 5th ORDER AUDIO LPF W + FM
DETECTOR RECTIFIER CCA
30 31 32 33
DETR DCR EMPHR DCFBR
carrier ratio select, record-mute
1.7 or 1.8 MHz
HEAD AMPLIFIER
HF LFP
COMPRESSOR EXPANDER
FM (DE-)MODULATOR
volume left AUTN output select TUL E1L SAP
decoder select
+1 dB 12 V
19
DECL
4
+
M
+
L
+ +
M dub
+
M E2L E2R N dub volume right
R
TUR E1R SAP
20 M line select
DECR
N
16 E2L 15
LINEL MUTEL
input select
I/O CONTROL
envelope output select + record
17 E2R mute 18
LINER MUTER
L TUL TUR E2L E2R
PEAK HOLD
DCL VCC AUTO-MUTE 13 M 14
+ +
SAP M
M normal input level R PEAK HOLD DCR
RFCOUT MUTEC
normal select
TDA9605H
21 22 RF converter mute 12
MGR834
Product specification
TDA9605H
I2C-bus control
M = mute
LINOUT LININ
RFCAGC
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
5
PINNING DESCRIPTION tuner input mono tuner input left tuner input right CINCH input left CINCH input right external 1 input left external 1 input right external 2 input left external 2 input right auxiliary input left auxiliary input right RF converter AGC timing connection RF converter output mute for RF converter output mute for line output left line output left line output right mute for line output right decoder output left decoder output right linear audio output linear audio input DC feedback noise reduction connection left emphasis noise reduction connection left VCC PBIN2 RECOUT PBIN1 HMSW GNDH VCCH RMHID SDA SCL ENVOUT 34 35 36 37 38 39 40 41 42 43 44 DCFBR 33 EMPHR 32 GND Iref Vref DETR DCR 27 28 29 30 31 DETL 26 SYMBOL PIN DCL 25 DESCRIPTION DC decoupling noise reduction connection left detector noise reduction connection left ground reference standard current connection reference voltage connection detector noise reduction connection right DC decoupling noise reduction connection right emphasis noise reduction connection right DC feedback noise reduction connection right power supply head 2 playback input recording current output head 1 playback input head amplifier mode switch connection ground of head amplifier power supply of head amplifier record-mute mode or head identification input I2C-bus data input/output I2C-bus clock input HF or AF envelope output
SYMBOL PIN SAP TUNL TUNR CINL CINR EXT1L EXT1R EXT2L EXT2R AUXL AUXR RFCAGC RFCOUT MUTEC MUTEL LINEL LINER MUTER DECL DECR LINOUT LININ DCFBL EMPHL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
1999 Apr 14
5
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
41 RMHID
handbook, full pagewidth
36 RECOUT
44 ENVOUT
38 HMSW
37 PBIN1
35 PBIN2
39 GNDH
40 VCCH
34 VCC
42 SDA
43 SCL
SAP 1 TUNL 2 TUNR 3 CINL 4 CINR 5 EXT1L 6 EXT1R 7 EXT2L 8 EXT2R 9 AUXL 10 AUXR 11
33 DCFBR 32 EMPHR 31 DCR 30 DETR 29 Vref
TDA9605H
28 Iref 27 GND 26 DETL 25 DCL 24 EMPHL 23 DCFBL
LINOUT 21
RFCAGC 12
RFCOUT 13
MUTEC 14
MUTEL 15
LINEL 16
LINER 17
MUTER 18
DECL 19
DECR 20
LININ 22
MGR835
Fig.2 Pin configuration.
6
FUNCTIONAL DESCRIPTION
Input and output selections for the various modes are given in the following diagrams: * Standard operating mode (see Fig.3) * Dub-mix mode (see Fig.4) * Standby mode: active or passive (see Fig.5).
1999 Apr 14
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1999 Apr 14
TUNL TUNR CINL CINR EXT1L EXT1R EXT2L EXT2R SAP AUXL AUXR
(1)
Philips Semiconductors
Audio processor with head amplifier for VHS hi-fi
decoder select TUNER EXT1 SAP MUTE input select TUNER CINCH EXT1 EXT2 SAP AUX DUB MIX NORMAL MUTE (-47 to 0 dB; 0 to +15 dB) volume left tape PBIN1 RECOUT PBIN2 output select MUTE MUTE (-47 to 0 dB; 0 to +15 dB) LEFT line select LINEL EXT2 OUTPUT SELECT LINER LEFT RIGHT STEREO RF converter AGC 0 dB AGC MUTE RFCOUT OUTPUT SELECT DECR line output amplification
DECL
0 dB +1 dB
HI-FI
AUDIO FM PROCESSING
RIGHT STEREO NORMAL NORMAL NORMAL
volume right
NORMAL
7
(1) For dub-mix mode signal selections see Fig.4.
envelope select OUTPUT SELECT normal select INPUT SELECT INPUT LEFT VOLUME VOLUME LEFT SAP TUNER EXT2 MUTE LINOUT LININ linear audio processing normal input level HF envelope MUTE (0 to +14 dB) STEREO HF ENVELOPE
MGR836
ENVOUT
Product specification
TDA9605H
Fig.3 Input and output selections for standard operating mode.
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1999 Apr 14
TUNL TUNR CINL CINR EXT1L EXT1R EXT2L EXT2R SAP AUXL AUXR volume hi-fi DUB MIX MUTE (-47 to 0 dB; 0 to +15 dB) MUTE (-47 to 0 dB; 0 to +15 dB) input select volume aux
Philips Semiconductors
Audio processor with head amplifier for VHS hi-fi
decoder select TUNER EXT1 SAP MUTE OUTPUT SELECT tape PBIN1 RECOUT PBIN2 output select MUTE LEFT line select LINEL EXT2 OUTPUT SELECT LINER RF converter AGC 0 dB AGC NORMAL MUTE LEFT RIGHT normal select INPUT SELECT INPUT LEFT VOLUME VOLUME LEFT SAP TUNER EXT2 MUTE LINOUT LININ linear audio processing (record) HF envelope OUTPUT SELECT STEREO HF ENVELOPE
MGR837
line output amplification
DECL
DECR
0 dB +1 dB
HI-FI
AUDIO FM PROCESSING
RIGHT STEREO NORMAL NORMAL
(playback)
NORMAL MUTE RFCOUT
8
normal input level MUTE (0 to +14 dB)
LEFT MUTE LEFT RIGHT LEFT
RIGHT
RIGHT envelope select
ENVOUT
Product specification
TDA9605H
Dub-mix mode: IS2 = 1, IS1 = 0 and IS0 = 1. Input mixing of the hi-fi (playback) signal with the auxiliary, used for linear audio dubbing recording. Selections generally used in combination with dub-mix mode are shown in heavy line type.
Fig.4 Input and output selections for dub-mix mode.
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TUNL TUNR CINL CINR EXT1L EXT1R MUTE EXT2L EXT2R SAP AUXL AUXR MUTE RFCOUT RF converter AGC MUTE line select LINEL EXT2 OUTPUT SELECT LINER input select output select
Philips Semiconductors
handbook, full pagewidth
Audio processor with head amplifier for VHS hi-fi
decoder select TUNER EXT1 SAP MUTE OUTPUT SELECT DECR line output amplification
DECL
0 dB +1 dB
9
MGR838
a. Active standby mode (bit STBA = 1, bit STBP = 0); over 80% power reduction.
TUNL TUNR CINL CINR EXT1L EXT1R EXT2L EXT2R SAP AUXL MUTE input select
Product specification
AUXR
TDA9605H
b. Passive standby mode (bit STBP = 1); over 90% power reduction. Fig.5 Input and output selections for standby modes.
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
6.1 Record-mute mode or head identification selection
TDA9605H
The state of the RM control signal on pin RMHID is don't care in the playback mode. I2C-bus control bits HAC2, HAC1 and HAC0 offer a wide selection of playback amplification to fit different head and head transformer specifications. The advised setting of the playback amplification realizes a level of 24 mV (RMS) for each carrier signal after the head amplifier to obtain a 17 dB overhead compared to the auto-normal level (hi-fi detection). However, performance is not critical and a different setting can be used if desired. The carrier level can be measured using the HF envelope output voltage on pin ENVOUT (bit EOS = 1). During standard operating mode the HF envelope signal is derived from the left channel carrier amplitude (1.3 or 1.4 MHz carrier) but the special test 10 of the test mode also enables the HF envelope output of the right channel carrier amplitude (1.7 or 1.8 MHz carrier). The advised carrier playback level of 24 mV (RMS) equals an HF envelope voltage of 3.3 V. The head amplifier output signal can be monitored directly by using test 8 of the test mode. Pin ENVOUT functions as the test output showing 6 dB attenuation compared to the actual head amplifier output level (see Section 14.4). Table 1 Selection of the head signal LEVEL ON PIN RMHID lower than 0.6 V or between 2.65 and 3.8 V between 1.0 and 2.35 V or higher than 4.3 V RECORD-MUTE MODE SELECTION OF HEAD SIGNAL pin PBIN2 (head 2) pin PBIN1 (head 1)
Pin RMHID allows input of two independent digital control signals for selecting the record-mute or head identification modes which are voltage coded. The RM control signal is selected via a 10 k resistor and the HID control signal is selected via a 18 k resistor. This set-up enables the two signals within the TDA9605H to be separated. The RM control signal is only in use during the record mode (bit AFM = 1); during the playback mode (bit AFM = 0) the RM signal is ignored. Pin RMHID should be connected to ground when the RM control signal is not used. The use of the RM control signal is optional since the same function is available via the I2C-bus control in the record-mute mode. However, accurate timing of recording start and stop may sometimes be difficult to realize via the I2C-bus control. In this event the RM control signal can be used instead. There is also the possibility to use the record-mute mode control line of the video head amplifier. 6.2 Hi-fi audio output level
When the application circuit is used in accordance with the application diagram, the standard FM deviation of 50 kHz equals a 1 kHz audio signal of -8 dBV line output level (bit LOH = 0). A different standard audio level can be selected by changing the external filter components of the noise reduction on pins EMPHL and EMPHR (see Section 14.3). The standard audio level changes proportionally to the impedance of the external de-emphasis filter. 6.3 Reference current
HID SIGNAL LOW HIGH
The external resistor connected to pin Iref defines the internal reference currents and determines the temperature stability of circuits adjusted by the auto-calibration function. 6.4 6.4.1 Head amplifier PLAYBACK MODE
6.4.2
The record-mute mode is selected by setting bit AFM = 1 and either setting bits DOC, SHH and DETH to logic 0 or switching the RM control signal to HIGH-level. During the record-mute mode no recording current is present on pin RECOUT (see Fig.6). The head amplifier status actually equals the playback mode, however, the second amplifier stage is disabled to minimize power consumption. The RM control signal on pin RMHID enables fast switching between the record and record-mute modes (see Table 2). If the I2C-bus control is set to the record mode, the use of record-mute mode control via pin RM allows for accurate timing of recording start and stop, independent of the I2C-bus control (see Section 6.1).
The playback mode is selected by setting bit AFM = 0. During the playback mode the input circuit on pins PBIN2 and PBIN1 is enabled (see Fig.6). Pin RECOUT is disabled and pin HMSW shows a low impedance to ground, so realizing an AC ground for the head circuit via the external capacitor connected between these pins. The head identification (HID) signal on pin RMHID selects between the head signals on pins PBIN2 or PBIN1. Head selection is defined as shown in Table 1.
1999 Apr 14
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Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
Table 2 Selection of recording modes LEVEL ON PIN RMHID lower than 2.35 V RECORD MODE record or record-mute mode as defined by I2C-bus control
TDA9605H
RM SIGNAL LOW
The DC bias current on pin RECOUT is changed proportional to the selected recording current for optimizing the performance and minimizing the power consumption for each recording current selected. A Boucherot damping circuit is connected between pin HMSW and ground to prevent head current resonance peaking. A capacitor of 10 nF and a resistor of 470 are specified in Fig.14, but the component values are not critical. 6.4.4 HEAD AMPLIFIER POWER SUPPLY AND GROUND
HIGH 6.4.3
higher than 2.65 V record-mute mode RECORD MODE
The record mode is selected by setting bit AFM = 1 and setting bits DOC, SHH and DETH from logic 001 to 111 and switching the RM control signal to LOW-level. During the record mode actual recording is activated and the recording current is output on pin RECOUT (see Fig.6). Pins PBIN2 and PBIN1 form a connection to the 5 V head amplifier supply voltage (VCCH). Pin HMSW is internally connected to pin RECOUT and the external capacitor has no function in this mode. The desired carrier mix ratio is set via I2C-bus control bits DOC, SHH and DETH. A wide selection of recording currents is available to fit different head and head transformer specifications and are set via bits HAC2, HAC1, HAC0 and range bit HRL. The setting of the carrier mix ratio does not change the selected recording current.
The head amplifier is supplied via a separate 5 V supply (pin VCCH) and ground (pin GNDH). A capacitor of 100 nF should be placed close to the device between pins VCCH and GNDH for proper decoupling of the power supply. The head amplifier ground (pin GNDH) should be connected to the main ground (pin GND).
handbook, full pagewidth
VCCH 35 k PBIN2 35 AH2 RECOUT 36 AH1 PBIN1 37 AH2 RECOUT 36 VCCH 35 k AH1 PBIN1 37 5 GNDH PBIN2 35
GNDH
HMSW 38 GNDH
GNDH
HMSW 38
TDA9605H
TDA9605H
MGR841
a. Playback mode and record-mute mode.
b. Record mode.
Fig.6 Simplified circuit diagrams of the head amplifier modes.
1999 Apr 14
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Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
6.5 Automatic calibration
TDA9605H
The integrated auto-calibration system is activated by means of bit CALS of the power byte (see Fig.7). The auto-calibration system ensures hi-fi processing is well in accordance with the VHS hi-fi system standard by an automated adjustment of carrier frequencies, band-pass filters and noise reduction filters. Calibration is only needed after start-up of the video recorder. The calibration settings remain stable as long as the supply voltage (VCC) is present. Auto-calibration is only executed in the record-mute mode or record mode and no standby mode or test mode should be selected, i.e. auto-calibration requires the setting of bit AFM = 1, bit STBP = 0, bit STBA = 0 and bit TEST = 0. Auto-calibration is started after setting bit CALS = 1. Calibration is performed fully automatically, using the HID control signal as a time reference. Audio signals are not disturbed during the calibration process. Calibration of the oscillator frequencies is performed by measuring the number of oscillator cycles within one period when the HID control signal is at HIGH-level and comparing this result with an internal value stored in the Read Only Memory (ROM). Four different ROM values are available for NTSC or PAL (SECAM) system calibration of both the left and right channel carrier. In case of NTSC a special routine is active for the calibration of the right channel carrier which results in a
frequency difference between the left and right channel carrier near to 401.2 kHz. This value effectively reduces the crosstalk from hi-fi carriers to video colour signal as present during Extended Play (EP) tape speed. NTSC calibration uses a standard HID control signal of 29.97 Hz (pulse width =16.683 ms) where PAL calibration uses a standard HID control signal of 25 Hz (pulse width = 20 ms). After auto-calibration the maximum frequency error is 5 kHz assuming a time error of maximum of 5 s when the HID control signal is at HIGH-level. Jitter on the HID control signal should not exceed 1 s to realize EP optimization within 2 kHz for NTSC. In general, the crystal based HID control signal available in the video recorder can be used without modification. When the calibration of the oscillators is completed the band-pass filters are calibrated. The integrated weighting and FM de-emphasis filters of the noise reduction are calibrated at the same time. The total auto-calibration time needed is maximum 17 cycles of the HID control signal. Completion of the calibration is signalled by bit CALR =1 of the read byte. The calibration can also be monitored by means of the envelope output. For this purpose the voltage on pin ENVOUT is forced to >2.5 V during the calibration. The audio signal to the audio envelope function (level meter) should be muted (i.e. output select = mute).
handbook, full pagewidth I2C-bus write bit CALS
logic 0
logic 1
RMHD input
left channel oscillator right channel oscillator band-pass and noise reduction filters
I2C-bus read bit CALR
logic 0
logic 1
ENVOUT output
3V
4V
5V calibration ready MGR842
Fig.7 Example of automatic calibration flow.
1999 Apr 14
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Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
Otherwise, the audio envelope output voltage may become >2.5 V which makes it impossible to detect the completion of the calibration on pin ENVOUT. Calibration relies upon the frequency accuracy of the HID control signal. The calibration result may be incorrect when the HID control signal is disturbed during a critical part of the calibration. An additional check is incorporated to detect such a situation by reading bit CALE during calibration. When bit CALE = 1, the calibration result is detected to be unreliable due to external causes. A new auto-calibration can be started by setting bit CALS = 0 followed by setting bit CALS = 1. Bit CALE always reads logic 1 when bit CALS is logic 0. The oscillators and band-pass filters can be switched between NTSC and PAL system frequencies after a calibration in NTSC or PAL mode without the need of additional calibration. Switching between these system modes is executed immediately and can be done in any operating mode. The frequency accuracy of system switching is 100 3 kHz for both carriers. To obtain the best possible frequency accuracy in the record mode it is good practice to recalibrate after system switching. 6.6 Power muting
TDA9605H
Switching off and on of the power supply voltage or using the built-in passive standby mode results in rising and dropping of the output DC voltages and causes strong disturbances on the output pins. The TDA9605H includes three integrated mute switches to block such disturbances so avoiding the need for an external mute circuit. Pop-free line and RF converter output signals are realized by connecting the integrated power mute switches behind the line and RFC output capacitors. Power muting is active when bit MUTE = 1 (see Fig.8). Power muting is automatically activated when VCC is switched on, because this situation is the Power-on reset default state. The integrated mute switches on pins MUTEC, MUTEL and MUTER are closed and form a low-impedance path to ground. Furthermore, the pins RFCOUT, LINEL and LINER are current limited to -1 mA to avoid excessive supply currents and to achieve good noise attenuation without the need for a series resistor between the output and mute pins. Pins DECL and DECR are also current limited for using the integrated power mute switches or for assisting external muting.
handbook, full pagewidth
VCC
auto-mute (VCC < 7 V) bit MUTE (I2C-bus) (1) (1)
bit STBP (I2C-bus) RFCOUT LINEL LINER output signal with power mute MUTEC MUTEL MUTER auto-mute power off
MGR843
power off t mute
active operation t mute
passive standby t mute
active operation t mute
power off (standby) t mute
active operation
(1) Power-on reset.
Fig.8 Examples of power mute control and the auto-mute function.
1999 Apr 14
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Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
During power muting the internal output signal is also muted. After the output DC voltage has been established power muting can be de-activated by setting bit MUTE = 0. Now the mute switches are opened resulting in a high-impedance path of 100 k to ground. The output current limiting is not active. Power muting is also used in combination with the integrated passive standby mode (bit STBP = 1). During this mode the output circuits are switched off and the line, decoder and RF converter output voltages decrease to 0 V using a discharge current of 1 mA. Do not set power mute mode and change the passive standby mode at the same time. Power mute mode should be activated first, followed by switching on or off of the passive standby mode to avoid possible output glitches. It should be noted that the time needed for stabilizing the output DC voltage is proportional to the output capacitor value. A safe mute time is 200 ms using a 10 F capacitor (tmute = C x 20000 s). Power muting consumes approximately 4 mA additional supply current, so to obtain minimum power consumption the mute mode should be de-activated after use. Very good performance is achieved for power-up, power-down and passive standby mode switching. An auto-mute function is included which activates power muting when the supply voltage drops below 7 V. The performance of this auto-mute function depends upon the power voltage drop rate. The voltage drop rate should not exceed 1 V during 10 ms. The best performance independent of voltage drop rate is realized by activating the passive standby mode before switching off the power supply voltage (by setting bit MUTE = 1 and bit STBP = 1). 6.7 Envelope output
TDA9605H
Pin ENVOUT is an analog output for stereo audio level (e.g. level meter display) and for playback FM carrier level (e.g. auto-tracking). The functional diagram is given in Fig.9 and the timing diagram is shown in Fig.10. Only one ADC input is needed on the microcontroller for reading all the required information. During the playback mode the selection between audio level and carrier level information is realized by setting I2C-bus control bit EOS (see Table 3). The AF envelope output is defined by the signal selection made at the output select. During the record mode bit EOS offers the selection between the audio level of the output select or the audio level of the fixed hi-fi stereo signal. This is a helpful setting when the microcontroller uses the audio level information to adjust the hi-fi recording level (volume control). The HF envelope output signal is continuous and is derived from the left channel carrier. The HF envelope output exhibits a logarithmic characteristic (see Fig.11). In a standard application circuit only the left channel carrier level is required to support auto-tracking or manual tracking. However, test 10 of the special test mode allows for the right channel carrier level output instead for measurement purposes (see Section 14.4). The AF envelope output as a function of the output level is given in Fig.12. The AF envelope circuit uses time multiplexing for the left and right channel audio level. A peak-hold function and dynamic range compression (square root function) are included for easy read out. The peak-hold function and the left and right channel multiplexing are controlled by the HID control signal on pin RMHID (see Table 4).
Table 3 MODE
Selection of the envelope output BIT AFM 0 1 BIT EOS 0 1 0 1 ENVELOPE OUTPUT AF envelope: via output select HF envelope AF envelope: via output select AF envelope: hi-fi stereo FUNCTION level meter display auto-tracking or manual tracking display level meter display record volume control (and level display)
Playback Record
Table 4
AF envelope output with channel multiplexing LEVEL ON PIN RMHID lower than 0.6 V or between 2.65 and 3.8 V between 1.0 and 2.35 V or higher than 4.3 V AF ENVELOPE OUTPUT left channel audio peak level right channel audio peak level
HID SIGNAL LOW HIGH
1999 Apr 14
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Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
handbook, full pagewidth
RM HID td
RMHID
left channel audio: output select hi-fi right channel audio: output select hi-fi EOS * AFM
FULL-WAVE RECTIFIER
SQUARE ROOT COMPRESSION
RESET
SAMPLE
PEAK HOLD
RESET
SAMPLEAND-HOLD
SAMPLE
FULL-WAVE RECTIFIER
SQUARE ROOT COMPRESSION
ENVOUT AF envelope EOS * AFM HF envelope
PEAK HOLD
SAMPLEAND-HOLD
1.3 or 1.4 MHz carrier
HF LEVEL DETECTOR
1.7 or 1.8 MHz carrier
HF LEVEL DETECTOR test 10
MGR845
Fig.9 Functional diagram of the envelope output circuit.
I2C-bus handbook, full pagewidth registers
EOS = 1 and AFM = 0
EOS = 0 or AFM = 1
HID signal
HID period
0
1
2
3
peak right in period -1 ENVOUT HF envelope peak left in period 0
peak right in period 0 peak left in period 1
peak right in period +1 peak left in period 2 left (period 1) right (period 1)
peak right peak left in period +2 in period +3
level meter display
tracking level indication
left (period 0) right (period 0)
left (period 2) right (period 2)
MGR844
Fig.10 Timing diagram of the envelope output signal.
1999 Apr 14
15
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
handbook, halfpage
5
MGR846
handbook, halfpage
5
MGR847
ENVOUT output voltage 4 (V)
ENVOUT output voltage 4 (V)
3
3
2
2
1
1
0 10-1
1
10
102
103
0 -40
-30
left channel carrier amplitude (RMS value) (mV)
-20 -10 0 10 LINEL and LINER output level (dBV)
1.3 MHz (NTSC) or 1.4 MHz (PAL) at internal node between head amplifier and HF AGC.
Bit LOH = 0.
Fig.11 HF envelope output (playback carrier level).
Fig.12 AF envelope output (audio peak level).
6.8
handbook, halfpage RF
MGR848
RF converter output
converter output (dBV) -3
An AGC function is incorporated to avoid overmodulation in the RF converter connected to pin RFCOUT. The AGC limits the maximum signal level on the RF converter output to -3 dBV (see Fig.13). The RF converter output can be muted by setting bit RFCM = 1. When using this RF converter mute, the AGC control is reset by discharging the capacitor connected to pin RFACG.
-3
line output (dBV)
Fig.13 AGC output of RF converter.
1999 Apr 14
16
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
6.9 Audio dubbing
TDA9605H
The TDA9605H includes unparalleled functionality supporting the audio dubbing function of hi-fi video recorders. Audio dubbing is a feature which enables the recording of new sound material on the linear audio track (i.e. normal sound) of an existing recording. The dub-mix mode is selected by setting bit IS2 = 1, bit IS1 = 0 and bit IS0 = 1. Audio dubbing can be used in two different ways: * Output mix * Input mix. 6.9.1 OUTPUT MIX
The circuit changes into a mixing desk when using the dub-mix mode of the input select function in combination with the volume setting of normal select. A new linear audio recording can be created by mixing together the new and the original sound. Continuous user control over amplitude and ratio mix of the auxiliary input signal (e.g. a microphone input) and the original hi-fi playback sound is possible using the left and right channel volume controls. This function is realized inside the IC by connecting the auxiliary input signal pair (pins AUXL and AUXR) to the left channel volume control and the hi-fi output signal pair to the right channel volume control. The settings of the output select function are used to arrange the hi-fi selection and the output signals in the dub-mix mode. However, some of these settings are overruled in the dub-mix mode. The normal signal is available on the line outputs for monitoring the dub-mix recording signals in the output select function modes mix-left, mix-right and mix-stereo. Mix-stereo of the output select function is generally used for audio dubbing. In combination with the volume setting of normal select, user control over amplitude and ratio is offered for the auxiliary and the hi-fi signal as follows: (14 x aux left + 14 x aux right) x volume left plus (14 x hi-fi left + 14 x hi-fi right) x volume right. The dub-mix mode is to be used in the (hi-fi) playback mode. In the record mode, a signal loop from output to input can be closed which may cause audio oscillation. The auto-normal switching is not active during the dub-mix mode. The hi-fi sound is muted when no hi-fi input signal is detected; bit AUTN is not affected.
A new additional recording is made on the linear audio track. In the playback mode, the new linear audio sound and the original hi-fi sound are combined. In this way the hi-fi stereo quality remains and the linear audio sound is partly used (e.g. for commentary only). However, there is no control over the original hi-fi sound. Mixing of the hi-fi and normal sound signals in the playback mode is supported by the output select function mix-left, mix-right and mix-stereo (bits OSN, OSR and OSL) and creates a new fixed output signal of 12 x hi-fi plus 1 x normal. 2 6.9.2 INPUT MIX
A new complete recording is made on the linear audio track (see Fig.4). In the playback mode, only the linear audio sound is used. In this way the hi-fi stereo quality is lost, but total freedom in defining the new sound material is an extra advantage. Furthermore, such recording is no longer restricted to playback on hi-fi video recorders (with an output mix option). Table 5 Dub-mix mode DUB-MIX OUTPUT SELECTION mute hi-fi left hi-fi right hi-fi stereo normal normal normal normal
OUTPUT SELECT MODE mute hi-fi left hi-fi right hi-fi stereo normal mix-left mix-right mix-stereo
DUB-MIX INPUT LEFT CHANNEL aux stereo aux stereo aux stereo aux stereo aux stereo aux stereo aux stereo aux stereo RIGHT CHANNEL mute hi-fi left hi-fi right hi-fi stereo mute hi-fi left hi-fi right hi-fi stereo
1999 Apr 14
17
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
7 7.1 I2C-BUS PROTOCOL Addresses and data bytes
TDA9605H
Full control of the TDA9605H is accomplished via the 2-wire I2C-bus. Bus speeds up to 400 kbits/s can be used in accordance with the I2C-bus fast-mode specification. Seven data byte registers are available for programming the device (write mode) and one data byte register is available for reading data from the device (read mode). The registers are addressable via eight subaddresses. Automatic subaddress incrementing enables writing of successive data bytes in one transmission. During power-up, the data byte registers and auto-calibration registers are reset to a default state by the use of a Power-On Reset (POR) circuit. The reset signal is derived from an internally generated voltage supplied by VCC. Table 6 Addresses and POR state bits ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
NAME Write mode Slave byte Subaddress byte Control byte POR state Select byte POR state Input byte POR state Output byte POR state Left volume byte POR state Right volume byte POR state Volume byte Power byte POR state Read mode Slave address byte Read byte Notes
B8H 00H to 07H; note 1
1 0
0 0 DOC 0 DOS0 0 IS2 0 OSN 0 VLS 1 VRS 1 VCCS 0
1 0 SHH 0 s5 0(2) IS1 0 OSR 0 VL5 0 VR5 0 TEST 0
1 0 DETH 0 HRL 0 IS0 0 OSL 0 VL4 0 VR4 0 PORR 0
1 0 NTSC 1 NIL3 0 NS2 1 EOS 0 VL3 0 VR3 0 HPD 0
0 0 or 1 HAC2 0 NIL2 0 NS1 1 LOS 0 VL2 0 VR2 0 MUTE 1
0 0 or 1 HAC1 0 NIL1 0 NS0 1 DOS 0 VL1 0 VR1 0 STBP 0
0 0 or 1 HAC0 0 NIL0 0 i0 0(2) RFCM 1 VL0 0 VR0 0 STBA 0
subaddress 00H AFM 1 subaddress 01H DOS1 0 subaddress 02H i7 0(2) subaddress 03H LOH 0 subaddress 04H l7 0(2) subaddress 05H r7 0(2) subaddress 07H CALS 0
subaddress 06H simultaneous loading of the subaddress 04H and subaddress 05H registers
B9H B9H
1 CALR
0 AUTN
1 CALE
1 POR
1 0(3)
0 0(3)
0 0(3)
1 0(3)
1. Continuous writing to a single data byte register is possible when subaddresses F0H to F7H (1111 0xxx) are used instead of 00H to 07H (0000 0xxx). In that case automatic subaddress incrementing is disabled. 2. It is advised to keep the not-used write bits equal to the POR state to accommodate future compatibility. 3. You cannot rely upon the state of the not-used read bits because their state may change during development.
1999 Apr 14
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Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
7.2 Valid transmissions to and from the TDA9605H Examples of valid transmissions FUNCTION Write Write with auto-increment Write with auto-increment `wrap-around' Write without auto-increment Read Read (continued) 7.3 DATA TRANSFER SEQUENCE START, B8H, 00H, data for 00, STOP
TDA9605H
Table 7
START, B8H, 00H, data for 00, data for 01, data for 02, STOP START, B8H, 07H, data for 07, data for 00, data for 01, STOP START, BBH, F6H, data for 06, data for 06, data for 06, STOP START, B9H, data from IC, STOP START, B9H, data from IC, data from IC, data from IC, STOP
Overview of the TDA9605H I2C-bus control Condensed overview FUNCTION MODES playback and record on and off 6 s and 8 s slow and fast record-mute, 3, 4.5, 6, 8, 9.5, 11 and 12.5 dB mix ratio NTSC and PAL 48, 51, 54, 57, 60, 63, 66 and 69 dB AFM DOC SHH DETH DOC, SHH and DETH NTSC HAC2, HAC1 and HAC0 CONTROL BITS
Table 8
Audio FM mode Playback dropout cancelling Playback head switch noise cancel time Playback hi-fi carrier detection time Record-mute and carrier ratio select System standard Playback head amplifier amplification Record head amplifier current Normal input level Input select Normal select Line output amplification Output select Envelope select Line select Decoder select RF converter mute Volume left Volume right Auto-calibration Supply voltage select Test
12.5, 15, 17.5, 21, 25, 30, 35, 42, 50, 60, HAC2, HAC1, HAC0 and HRL 71 and 84 mA (p-p) 0 to 14 dB and mute tuner, CINCH, ext1, ext2, SAP, dub-mix, normal and aux input select, volume, input-left, volume-left, SAP, tuner, ext2 and mute 0 dB and +1 dB mute, left, right, stereo, normal, mix-left, mix-right and mix-stereo output select, stereo and HF envelope output select and ext2 0 dB AGC and mute -47 to 0 dB, mute and 0 to 15 dB -47 to 0 dB, mute and 0 to 15 dB off and start calibration 9 V and 12 V standard operating mode and test mode NIL3, NIL2, NIL1 and NIL0 IS2, IS1 and IS0 NS2, NS1 and NS0 LOH OSN, OSR and OSL EOS and AFM LOS RFCM VLS and VL5 to VL0 VRS and VR5 to VR0 CALS VCCS TEST, HRL, NIL3, NIL2, NIL1 and NIL0
output select, tuner, ext1, SAP and mute DOS, DOS1 and DOS0
1999 Apr 14
19
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
FUNCTION Playback head amplifier disable Power output muting Operating mode
MODES standard operating mode and playback disabled power mute HPD MUTE
CONTROL BITS
standard operating mode, active standby STBP and STBA and passive standby
7.4
Control byte at subaddress 00H
The control byte is used to set the parameters of hi-fi processing and head amplifier control. 7.4.1 AUDIO FM MODE
Bit AFM controls the main mode of the hi-fi processing and head amplifier. The function of other bits of the control byte and bit EOS of the output byte depends on the state of bit AFM. Table 9 AFM 0 1 7.4.2 Audio FM mode selection (bit AFM) MODE playback record PLAYBACK MODE DESCRIPTION hi-fi processing in playback mode and head amplifier in playback mode hi-fi processing in record mode and head amplifier is in record mode or record-mute mode
When during the playback mode no FM carrier is detected from tape, the normal audio signal on pin LININ is automatically selected by the output select function. For this auto-normal mode: * The timing of the hi-fi carrier detection can be selected via bit DETH which defines the auto-normal release time: - Fast mode: hi-fi detection delay is 1 to 2 HID control signal periods (for NTSC: 33 to 66 ms; for PAL: 40 to 80 ms) - Slow mode: hi-fi detection delay is 7 to 8 HID control signal periods (for NTSC: 233 to 267 ms; for PAL: 280 to 320 ms). * The state of hi-fi detection and auto-normal can be monitored by I2C-bus control bit AUTN of the read byte. * In case automatic selection of the normal audio signal is not required the normal input level control can be set to mute (bits NIL3 to NIL0 of the select byte). Table 10 Dropout cancelling (bit DOC), sample-and-hold high-state (bit SHH) and detector time hi-fi (bit DETH) in the playback mode; note 1 AFM DOC SHH DETH 0 0 0 0 0 0 Note 1. X = don't care. 0 1 X X X X X X 0 1 X X X X X X 0 1 MODE playback and DOC off playback and DOC on playback and sample-and-hold time = 6 s playback and sample-and-hold time = 8 s playback and hi-fi detect = fast playback and hi-fi detect = slow DESCRIPTION dropout cancelling disabled dropout cancelling active head switch noise cancel time set to 6 s head switch noise cancel time set to 8 s fast mode hi-fi detector timing slow mode hi-fi detector timing
1999 Apr 14
20
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
7.4.3 RECORD MODE
TDA9605H
During the record-mute mode, the recording output current on pin RECOUT is muted and the head amplifier is partly disabled. The record mode, set by I2C-bus control, can also be changed to the record-mute mode by an external control signal on pin RMHID. Sometimes the record-mute mode is named loop-through mode or EE mode. Table 11 Dropout cancelling (bit DOC), sample-and-hold high-state (bit SHH) and detector time hi-fi (bit DETH) in the record mode AFM 1 1 1 1 1 1 1 1 Note 1. Power-on reset state. 7.4.4 SYSTEM STANDARD SELECTION DOC 0 0 0 0 1 1 1 1 SHH 0 0 1 1 0 0 1 1 DETH 0 1 0 1 0 1 0 1 MODE record-mute record and 3 dB mix record and 4.5 dB mix record and 6 dB mix record and 8 dB mix record and 9.5 dB mix record and 11 dB mix record and 12.5 dB mix DESCRIPTION record-mute and no recording output current; note 1 recording with 3 dB output carrier ratio (1 : 1.4) recording with 4.5 dB output carrier ratio (1 : 1.7) recording with 6 dB output carrier ratio (1 : 2) recording with 8 dB output carrier ratio (1 : 2.5) recording with 9.5 dB standard output carrier ratio (1 : 3) recording with 11 dB output carrier ratio (1 : 3.5) recording with 12.5 dB output carrier ratio (1 : 4.2)
Bit NTSC selects between the NTSC and PAL (SECAM) system carrier frequencies for the CCO modulators or PLL demodulators and the band-pass filters. FM carrier frequencies of 1.3 and 1.7 MHz are used for the NTSC system where 1.4 and 1.8 MHz are used for the PAL system. Different code settings for the auto-calibration circuit assure proper calibration using the standard HID control signal frequency of 29.97 Hz for NTSC mode and 25 Hz for PAL mode. After auto-calibration is completed bit NTSC enables instant switching between the NTSC and PAL system. Table 12 System standard selection (bit NTSC) NTSC 0 1 Note 1. Power-on reset state. PAL NTSC MODE DESCRIPTION hi-fi circuit in PAL mode hi-fi circuit in NTSC mode; note 1
1999 Apr 14
21
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
7.4.5 HEAD AMPLIFIER PLAYBACK AMPLIFICATION
TDA9605H
Eight settings of playback amplification can be selected for the head amplifier. The amplification values are valid for the head signals from pins PBIN1 or PBIN2 to the internal node between the head amplifier and HF AGC circuit. The setting of the playback amplification results in a selection of the hi-fi detection level (auto-normal function). The hi-fi detection level indicated is the RMS value of the left channel carrier signal on pins PBIN1 and PBIN2. The signal at the internal node can be monitored for testing purposes via pin ENVOUT using test 8 of the test mode. It should be noted that the output level of test 8 shows 6 dB attenuation compared to the internal node level. Table 13 Head amplifier control (bits HAC2, HAC1 and HAC0) in the playback mode AFM 0 0 0 0 0 0 0 0 7.4.6 HAC2 0 0 0 0 1 1 1 1 HAC1 0 0 1 1 0 0 1 1 HAC0 0 1 0 1 0 1 0 1 MODE 48 dB 51 dB 54 dB 57 dB 60 dB 63 dB 66 dB 69 dB DESCRIPTION hi-fi detection level equals 13 V (RMS) from head hi-fi detection level equals 9.4 V (RMS) from head hi-fi detection level equals 6.7 V (RMS) from head hi-fi detection level equals 4.7 V (RMS) from head hi-fi detection level equals 3.3 V (RMS) from head hi-fi detection level equals 2.4 V (RMS) from head hi-fi detection level equals 1.7 V (RMS) from head hi-fi detection level equals 1.2 V (RMS) from head
HEAD AMPLIFIER RECORD CURRENT
A total of twelve settings of the recording current can be selected for the head amplifier record output pin RECOUT. Bit HRL of the select byte selects between high and low current settings. The recording current is defined as the peak-to-peak value of the current of the record output signal which includes both the left and right carrier signal. The selected recording current is independent of the selected record mix ratio setting, but recording is disabled during the record-mute mode as defined by the bits DOC, SHH and DETH or the control signal on pin RMHID. Table 14 Head amplifier control (bits HAC2, HAC1 and HAC0) and head record current low (bit HRL) in the record mode AFM 1 1 1 1 1 1 1 1 1 1 1 1 HAC2 0 0 0 0 1 1 1 1 0 0 0 0 HAC1 0 0 1 1 0 0 1 1 0 0 1 1 HAC0 0 1 0 1 0 1 0 1 0 1 0 1 HRL 0 0 0 0 0 0 0 0 1 1 1 1 MODE 25 mA (p-p) 30 mA (p-p) 35 mA (p-p) 42 mA (p-p) 50 mA (p-p) 60 mA (p-p) 71 mA (p-p) 84 mA (p-p) 12.5 mA (p-p) 15 mA (p-p) 17.5 mA (p-p) 21 mA (p-p) DESCRIPTION high recording current is 25 mA (p-p) high recording current is 30 mA (p-p) high recording current is 35 mA (p-p) high recording current is 42 mA (p-p) high recording current is 50 mA (p-p) high recording current is 60 mA (p-p) high recording current is 71 mA (p-p) high recording current is 84 mA (p-p) low recording current is 12.5 mA (p-p) low recording current is 15 mA (p-p) low recording current is 17.5 mA (p-p) low recording current is 21 mA (p-p)
1999 Apr 14
22
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
7.5 Select byte at subaddress 01H
TDA9605H
The select byte is used for decoder output select, record current range select and linear audio volume control. 7.5.1 DECODER OUTPUT SELECT
By setting bit DOS = 0 of the output byte, the decoder output signal on pins DECL and DECR is defined by the output select function. However, by setting bit DOS = 1 the decoder select function enables several independent signal selections controlled via bits DOS1 and DOS0. Via the decoder select function the input signals on pins TUNL and TUNR, pins EXT1L and EXT1R and pin SAP can be selected. The mute mode can also be selected. The indicated decoder select function modes are also available during the active standby mode by setting bit STBA = 1. Table 15 Decoder output select (bits DOS1 and DOS0) DOS1 0 0 1 1 Note 1. Power-on reset state. 7.5.2 HEAD AMPLIFIER RECORD CURRENT RANGE SELECT DOS0 0 1 0 1 tuner ext1 SAP mute MODE DESCRIPTION selection of input signal on pins TUNL and TUNR; note 1 selection of input signal on pins EXT1L and EXT1R selection of input signal on pin SAP muting the input signal
The default selection of eight recording currents set by bits HAC2, HAC1 and HAC0 of the control byte is extended with four additional low level recording currents by setting bit HRL = 1. Table 16 Head amplifier record low current (bit HRL) HRL 0 1 Note 1. Power-on reset state. MODE high current low current DESCRIPTION selection of 8 medium and high-level recording currents; note 1 selection of 4 low-level recording currents
1999 Apr 14
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Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
7.5.3 NORMAL INPUT LEVEL
TDA9605H
Fifteen settings of amplification and mute can be selected for the linear audio input signal on pin LININ. The normal input level control can replace the manual adjustment of the playback level at the linear audio circuit. All selections using the normal linear audio signal include the normal input level control. Table 17 Normal input level (bits NIL3 to NIL0) NIL3 0 0 : 1 1 1 Note 1. Power-on reset state. 7.6 Input byte at subaddress 02H NIL2 0 0 : 1 1 1 NIL1 0 0 : 0 1 1 NIL0 0 1 : 1 0 1 0 dB 1 dB : 13 dB 14 dB mute MODE DESCRIPTION amplification of linear audio of 0 dB; note 1 amplification of linear audio of 1 dB : amplification of linear audio of 13 dB amplification of linear audio of 14 dB linear audio signal muted
The input byte is used for input selection of the hi-fi and linear audio. 7.6.1 INPUT SELECT
The input select function defines the input signal which is forwarded to the volume control function of hi-fi processing and usually via the normal select function to the external linear audio circuit on pin LINOUT. Table 18 Input select (bits IS2, IS1 and IS0) IS2 0 0 0 0 1 1 1 1 Notes 1. Power-on reset state. 2. The dub-mix mode is a special selection which supports audio dubbing. This video recorder feature enables the recording of the sound signal of the linear audio only (see Section 6.9). IS1 0 0 1 1 0 0 1 1 IS0 0 1 0 1 0 1 0 1 MODE tuner CINCH ext1 ext2 SAP dub-mix normal aux DESCRIPTION tuner input signal on pins TUNL and TUNR; note 1 CINCH input signal on pins CINL and CINR TV input signal on pins EXT1L and EXT1R decoder input signal on pins EXT2L and EXT2R mono input signal on pin SAP input signal on pins AUXL and AUXR (for left channel) and from hi-fi output signal (for right channel); note 2 from linear audio circuit (from pin LININ) input on pins AUXL and AUXR (e.g. camcorder input)
1999 Apr 14
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Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
7.6.2 NORMAL SELECT
TDA9605H
The normal select function defines which of the input signals is forwarded to pin LINOUT for the connection to an external linear audio circuit. Table 19 Normal select (bits NS2, NS1 and NS0) NS2 0 0 0 0 1 1 1 1 Note 1. Power-on reset state. 7.7 Output byte at subaddress 03H NS1 0 0 1 1 0 0 1 1 NS0 0 1 0 1 0 1 0 1 MODE input select volume input-left volume-left SAP tuner ext2 mute DESCRIPTION left plus right channel signal selected by input select left plus right channel signal including hi-fi volume control selected by input select left channel only (language 1) selected by input select left channel only (language 1) including hi-fi volume control selected by input select mono input signal from pin SAP tuner input signal from pins TUNL and TUNR external input signals from pins EXT2L and EXT2R mute of the input signals; note 1
The output byte is used for selecting and controlling the output. 7.7.1 LINE OUTPUT AMPLIFICATION
An additional 1 dB amplification for the line and decoder outputs on pins LINEL, LINER, DECL and DECR can be selected by the line output high function. Table 20 Line output high (bit LOH) LOH 0 1 Note 1. Power-on reset state. 7.7.2 OUTPUT SELECT MODE 0 dB 1 dB DESCRIPTION no line output amplification; note 1 1 dB line output amplification
The auto-normal function is activated when no hi-fi signal is found on tape in the playback mode. Except for the mute mode, all output select function modes will be overruled and changed to normal. Control of normal input level should be set to mute for muting the hi-fi sound. The state of the auto-normal function can be monitored by reading bit AUTN of the read byte.
1999 Apr 14
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Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
Table 21 Output select normal, right and left (bits OSN, OSR and OSL) OSN 0 0 0 0 1 1 1 1 Note 1. Power-on reset state. OSR 0 0 1 1 0 0 1 1 OSL 0 1 0 1 0 1 0 1 MODE mute left right stereo normal mix-left mix-right mix-stereo DESCRIPTION mute; no selection; note 1 left hi-fi channel selected (language 1) right hi-fi channel selected (language 2) hi-fi stereo selected
TDA9605H
normal signal selected (linear audio from pin LININ) mix of hi-fi left with normal (12 x left + 12 x normal) mix of hi-fi right with normal (12 x right + 12 x normal) mix of hi-fi stereo with normal (12 x stereo + 12 x normal)
In case the dub-mix mode is selected via the input select function, the performance of mix-left, mix-right and mix-stereo modes is changed to support audio dubbing input mixing. The hi-fi channel is available for the input select function and normal sound is available at the output for monitoring the linear audio recording. The auto-normal state is ignored during the dub-mix mode and the hi-fi playback signal is muted instead. Table 22 Dub-mix mode (bits OSN, OSR and OSL) OSN 0 0 0 0 1 1 1 1 7.7.3 OSR 0 0 1 1 0 0 1 1 OSL 0 1 0 1 0 1 0 1 MODE mute left right stereo normal mix-left mix-right mix-stereo OUTPUT IN DUB-MIX MODE mute left channel right channel stereo signal normal signal normal signal normal signal normal signal INPUT IN DUB-MIX MODE mute left channel right channel
1 2
x left + 12 x right
mute left channel right channel
1 2
x left + 12 x right
ENVELOPE OUTPUT SELECT
The output signal on pin ENVOUT is selected via the envelope select function. In the playback mode the HF envelope displays the amplitude of the left channel carrier. Display of the right channel carrier amplitude for special measurement purposes can be selected via test 10 in the test mode. Table 23 Envelope output select (bit EOS) AFM X(1) 0 1 Notes 1. X = don't care. 2. Power-on reset state. 1999 Apr 14 26 EOS 0 1 1 MODE output select HF envelope stereo envelope DESCRIPTION audio peak envelope of selected signal via output select function; note 2 HF envelope of the left channel carrier in the playback mode audio peak envelope of the hi-fi stereo signal in the record mode
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
7.7.4 LINE OUTPUT SELECT 7.7.6 RF CONVERTER MUTE
TDA9605H
An independent selection of the input signals from pins EXT2L and EXT2R to the line outputs on pins LINEL and LINER is offered by the line select function. In the active standby mode (bit STBA = 1) the output select signal is muted. However, the line select function of the ext2 input signal is still operating. In combination with the decoder select function a complete pay-TV decoder switching feature is offered via the SCART connector. Table 24 Line output select (bit LOS) LOS 0 1 Note 1. Power-on reset state. 7.7.5 DECODER OUTPUT SELECT MODE output select ext2 DESCRIPTION line output signal is set by output select; note 1 line output signal is from input signal on pins EXT2L and EXT2R
The RF converter output signal on pin RFCOUT can be muted by setting bit RFCM = 1. In this mute mode, the AGC capacitor on pin RFCAGC is discharged and the AGC control is reset. Table 26 RF converter mute (bit RFCM) RFCM 0 MODE AGC DESCRIPTION RF converter output signal is set by the output select function: AGC active RF converter output signal is muted and AGC control is reset; note 1
1 Note
mute
1. Power-on reset state. 7.8 Volume bytes at subaddresses 04H, 05H and 06H
The volume bytes are used to set left and right channel volume control. 7.8.1 Left and right volume control
The output signals on pins DECL and DECR can be selected by the decoder select function. By setting bit DOS = 0, the output signals are selected by the output select function. By setting bit DOS = 1, an independent selection between the input signals on pins TUNL and TUNR, pins EXT1L and EXT1R, pin SAP or mute is possible. These signals are selected by the decoder select function (bits DOS1 and DOS2). In the active standby mode (bit STBA = 1) the output select signal is muted. However, the decoder select function is still operating. In combination with the line select function a complete pay-TV decoder switching feature is offered via the SCART connector. Table 25 Decoder output select (bit DOS) DOS 0 1 Note 1. Power-on reset state. MODE output select decoder select DESCRIPTION decoder output signal is set by the output select function; note 1 decoder output signal is set by the decoder select function
Left channel volume control can be set by using subaddress 04H. Right channel volume control can be set by using subaddress 05H. Left and right channel volume control can be set simultaneous by using subaddress 06H.
1999 Apr 14
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Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
Table 27 Volume left sign (bit VLS), volume left (bits VL5 to VL0), volume right sign (bit VRS) and volume right (bits VR5 to VR0); note 1 VLS VRS 0 0 0 : 0 0 0 1 1 1 : 1 1 Notes 1. X = don't care. 2. Power-on reset state. 7.9 Power byte at subaddress 07H The combination of bit CALR = 1 and bit CALE = 0 indicates a successful calibration. Bit CALS should remain at logic 1 after the calibration to keep a reliable state of bit CALR and bit CALE. 7.9.2 DC OUTPUT VOLTAGE SELECTION VL5 VR5 0 0 0 : 1 1 1 X X X : X X VL4 VR4 0 0 0 : 0 0 1 X X X : X X VL3 VR3 0 0 0 : 1 1 X 0 0 0 : 1 1 VL2 VR2 0 0 0 : 1 1 X 0 0 0 : 1 1 VL1 VR1 0 0 1 : 1 1 X 0 0 1 : 1 1 VL0 MODE VR0 0 1 0 : 0 1 X 0 1 0 : 0 1 0 dB -1 dB -2 dB : -46 dB -47 dB mute 0 dB 1 dB 2 dB : 14 dB 15 dB volume 0 dB volume -1 dB volume -2 dB : volume -46 dB volume -47 dB mute volume 0 dB; note 2 volume 1 dB volume 2 dB : volume 14 dB volume 15 dB DESCRIPTION
The power byte is used for power-up settings and the standby control mode. 7.9.1 CALIBRATION START
Automatic frequency calibration by setting the hi-fi modem, the band-pass filter and the noise reduction is performed after a change of bit CALS from logic 0 to logic 1. The use of auto-calibration is only needed after power-up (Power-on reset) of the supply voltage (see Section 6.5). Table 28 Calibration start (bit CALS) CALS 0 1 Note 1. Power-on reset state. The output signal on pin ENVOUT or bit CALR (calibration ready) and bit CALE (calibration error) of the read byte can be monitored to check for completion of the calibration. 1999 Apr 14 28 MODE no calibration note 1 start calibration start of the automatic calibration cycle DESCRIPTION
The DC output level on pins LINEL, LINER, DECL and DECR can be changed by setting bit VCCS to maximize the output power when using a supply voltage of 12 V. The use of power muting (bit MUTE = 1) ensures disturbance free switching of the line output signal when setting bit VCCS after power-up. Table 29 VCC supply voltage select (bit VCCS) VCCS 0 1 Note 1. Power-on reset state. MODE 9V 12 V DESCRIPTION line and decoder output DC voltage is 4.5 V; note 1 line and decoder output DC voltage is 6 V
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
7.9.3 TEST MODE 7.9.5 HEAD AMPLIFIER DISABLE
TDA9605H
Several special tests can be selected for test, evaluation and measurement purposes. The selection of these tests is made by setting bit HRL and bits NIL3 to NIL0. See Section 14.4 for an overview of the test modes. Table 30 Test mode (bit TEST) TEST 0 1 Note 1. Power-on reset state. 7.9.4 POWER-ON RESET MODE operating mode DESCRIPTION standard operating; note 1
Bit HPD offers a special setting intended for use with some of the built-in test modes and for support of particular applications that do not require use of the integrated head amplifier. By setting bit HPD = 1 the head amplifier playback circuit is disabled. This mode enables direct input signal to the HF AGC circuit via pin HMSW (AC coupled via a 10 nF capacitor). Table 32 Head amplifier playback disable (bit HPD) HPD 0 1 MODE operating mode head amplifier disable DESCRIPTION standard operating mode; note 1 head amplifier disabled in playback mode (for test or special application)
test mode test mode for special measurements
Note 1. Power-on reset state. 7.9.6 POWER MUTING
Setting bit PORR = 1 ensures a reset of bit POR of the read byte to logic 0. In this way, a reading of logic 1 for bit POR always indicates the occurrence of an actual I2C-bus register Power-on reset and can not be caused accidentally by other I2C-bus control bits. Bit PORR has no control function but it is an unused bit, dedicated by name to change the I2C-bus register content from the Power-on reset state. Bit POR of the read byte is a logic AND function for checking all I2C-bus register bits. Bit POR will read logic 1 when the I2C-bus register content equals the Power-on reset default state and also when this state is set via the I2C-bus control. Since a setting of bit PORR = 1 differs from the Power-on reset default state, it forces a reset of bit POR to logic 0 independent of other bit settings. Table 31 Resetting of bit POR (bit PORR) PORR 0 1 Note 1. Power-on reset state. MODE no reset bit POR reset note 1 reset of bit POR (read byte) DESCRIPTION
The power mute function controls the mute switches on the line and RF converter outputs. The power mute mode is automatically activated via the Power-on reset function during power-up of the supply voltage. During power-down, the mute switches are activated automatically by means of the auto-mute circuit which is independent of the setting of bit MUTE. When setting bit MUTE = 1 the output current on pins RFCOUT, LINEL, LINER, DECL and DECR is limited to -1 mA for controlled power-up response and the selected output signal is muted (see Section 6.6). Table 33 Power mute (bit MUTE) MUTE 0 1 Note 1. Power-on reset state. MODE no mute mute DESCRIPTION power muting released: mute switches are open power muting activated: mute switches are closed; note 1
1999 Apr 14
29
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
7.9.7 STANDBY SELECT 7.10.1 CALIBRATION READY
TDA9605H
The TDA9605H is switched in the low-power active standby mode by setting bit STBA = 1. Most circuits are switched inactive for reducing power consumption. However, the RF converter, line and decoder outputs remain active in this mode and the direct audio selections offered via the line select function and the decoder select function remain available. The selected output signal is muted during the active standby mode. The TDA9605H is switched in the minimum power passive standby mode by setting bit STBP = 1. All circuits are switched inactive to obtain minimum power consumption except for the power mute circuit, the I2C-bus and the line input reference buffer (i.e. the DC voltage on pins 1 to 11 remains active). When bit STBP = 1 a discharge current of 1 mA is active on pins RFCOUT, LINEL, LINER, DECL and DECR. Power muting ensures disturbance-free switching of the line and RF converter outputs to and from the passive standby mode. In the passive standby mode power muting can be de-activated again to achieve minimum power consumption. The calibration and I2C-bus registers are not affected in the active standby or passive standby mode. Table 34 Standby passive (bit STBP) and standby active (bit STBA); note 1 STBP 0 0 STBA 0 1 MODE operating active standby passive standby DESCRIPTION standard operating mode: full function; note 2 active standby mode: reduced power consumption passive standby mode: minimum power consumption
The completion of calibration is signalled by changing bit CALR from logic 0 to logic 1. Bit CALR remains logic 0 if for some reason a calibration can not be completed (i.e. no HID control signal available or the hi-fi processing is in the playback mode). Bit CALR will also return to logic 0 if calibration is lost due to a Power-on reset situation. Additional information about the calibration result is available via bit CALE. Calibration is found correct if bit CALR = 1 and bit CALE = 0. Pin ENVOUT can also be used to monitor calibration (see Section 6.5). Table 35 Calibration ready (bit CALR) CALR 0 1 Note 1. Power-on reset state. 7.10.2 AUTO-NORMAL SELECTION DESCRIPTION not calibrated; note 1 auto-calibration completed
The auto-normal function is activated when no hi-fi carrier input signal is detected in the playback mode. The auto-normal function overrules the settings of the output select function and selects normal sound (i.e. linear audio) instead of hi-fi. The state of the auto-normal function can be checked by reading bit AUTN. The auto-normal function and therefore bit AUTN is only valid in the playback mode. Bit AUTN is always logic 0 in the record mode. Table 36 Auto-normal (bit AUTN) AUTN 0 1 Note 1. Power-on reset state. DESCRIPTION hi-fi carrier available; audio FM signal is detected from tape in playback mode; note 1 normal sound selected instead of hi-fi carrier; no audio FM signal is detected from tape
1
X
Notes 1. X = don't care. 2. Power-on reset state. 7.10 Read byte
The read byte is used for reading the device state information.
1999 Apr 14
30
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
7.10.3 CALIBRATION ERROR
TDA9605H
An unreliable calibration result is indicated when reading bit CALE = 1. The calibration result is not reliable when during calibration the control signal on pin RMHID is disturbed due to an external cause. Such a disturbance of the HID control signal is detected when reading bit CALE = 1. A new calibration should be started to ensure proper calibration. Calibration is found correct when bit CALR = 1 and bit CALE = 0. Table 37 Calibration error (bit CALE) CALE 0 1 Note 1. Power-on reset state. 7.10.4 POWER-ON RESET DESCRIPTION not calibrated or calibration result is found correct; note 1 calibration error encountered during calibration
Detecting the occurrence of a Power-on reset by reading bit POR requires a setting of bit PORR = 1 after power-up. Bit POR is forced to logic 0 only by setting bit PORR = 1, so this setting is independent of other I2C-bus bit settings. After calibration a Power-on reset occurrence is also indicated by bit CALR = 0, because calibration will be lost. Table 38 Power-on reset (bit POR) POR 0 1 Note 1. Power-on reset state. I2C-bus state I2C-bus bit state equals the Power-on reset state; note 1 DESCRIPTION bit state differs from the Power-on reset
An internal Power-on reset signal is generated at power-up or during a power voltage dip. The I2C-bus data bits and auto-calibration registers are reset to a pre-defined state. When reading bit POR = 1, it indicates that the internal data bits are found to be in the POR state due to an actual Power-on reset or the I2C-bus control settings.
1999 Apr 14
31
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
8 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCC VCCH Tstg Tamb Ves Ilu(prot) supply voltage head amplifier supply voltage storage temperature operating ambient temperature electrostatic handling voltage latch-up protection current on pin HSMW pin SDA all other pins 9 THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air machine model human body model Tj = 100 C -70 -60 -100 PARAMETER CONDITIONS 0 0 -65 0 -300 -3000 MIN.
TDA9605H
MAX. 13.2 5.5 +150 70 +300 +3000 +100 +100 +100 V V
UNIT
C C V V mA mA mA
VALUE 60
UNIT K/W
10 GENERAL CHARACTERISTICS SYMBOL Supplies VCC VCCH ICC supply voltage head amplifier supply voltage supply current standard operating mode active standby (STBA = 1) passive standby (STBP = 1) ICCH head amplifier supply current playback mode record-mute mode record mode (HAC = 000) record mode (HAC = 011) record mode, (HAC = 111) active or passive standby (STBA = 1 or STBP = 1) VCCS = 0 VCCS = 1 8.1 8.1 4.75 - - - - - - - - - 9 12 5 36 8 4 21 18 23 35 67 0 13.2 13.2 5.5 48 12 6 28 24 31 47 89 - V V V mA mA mA mA mA mA mA mA mA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
1999 Apr 14
32
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
SYMBOL
PARAMETER
CONDITIONS -
MIN.
TYP. -
MAX.
UNIT
Internally generated voltage levels Vn1 DC voltage on pins SAP, TUNL, TUNR, CINL, CINR, EXTL1, EXTLR, AUXL, AUXR, LININ and RFCOUT DC voltage on pin LINOUT DC voltage on pins LINEL, LINER, DECL and DECR VCC = 9 V (VCCS = 0) VCC =12 V (VCCS = 1) record or record-mute with I2C-bus control (RM = LOW) for head 2 (HID = LOW) for head 1 (HID = HIGH) record-mute (RM = HIGH) for head 2 (HID = LOW) for head 1 (HID = HIGH) 2.65 4.3 - - 3.8 5.5 V V 0 1.0 - - 0.6 2.35 V V 3.8 V
Vn2 Vn3
- - -
4.5 4.5 6
- - -
V V V
Control signal input: pin RMHID VI input voltage
11 RECORD-MUTE MODE CHARACTERISTICS VCC = 12 V; Tamb = 25 C; tuner audio input level -8 dBV at f = 1 kHz; Power-on reset state with output select = stereo; bit RFCM = 0; bit MUTE = 0; auto-calibrated; measured in typical application circuit of Fig.14; unless otherwise specified. SYMBOL PARAMETER CONDITIONS - 100 - 100 -9 - -9 -8 7 10 - - - - 33 MIN. - 130 - 130 -8 200 -8 -7 8 11 1 -1 100 0.01 TYP. MAX. UNIT
Line inputs: pins SAP, TUNL, TUNR, CINL, CINR, EXT1L, EXT1R, EXT2L, EXT2R, AUXL and AUXR Vi Ri Vi Ri Vo Ro Vo Vo(max) Io(dch) Io(max) Ro THD 1999 Apr 14 input voltage input impedance 9 - dBV k
Linear audio input: pin LININ input voltage input impedance 8 - -7 300 -7 -6 - - - - 150 0.1 dBV k
Linear audio output: pin LINOUT output voltage output impedance dBV
Line and decoder outputs: pins LINEL, LINER, DECL and DECR output voltage maximum output voltage discharge output current output current limiting output impedance total harmonic distortion normal output (LOH = 0) output = 1 dB (LOH = 1) VCC = 9 V; note 1 VCC = 12 V; note 1 passive standby (STBP = 1) power mute (MUTE = 1) dBV dBV dBV dBV mA mA %
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
SYMBOL cb Vn mute(v) mute(o) ct(ch) ct(ch)(i)
PARAMETER channel balance noise level mute volume mute output crosstalk between channels crosstalk between input channels
CONDITIONS tuner input signal at zero level - dBV; note 2 volume bytes left and right set to mute mode output select bits set to mute mode one of tuner input signals at zero level - dBV note 3 - - - - -
MIN. -1 0
TYP. -94 -96 -86 -90 <-93
MAX. +1 -90 -70 -70 -70 -
UNIT dB dBV dB dB dB dB
RF converter output: pin RFCOUT Vo output voltage tuner input signal at normal level -8 dB high level 8 dBV THD total harmonic distortion tuner input signal at normal level -8 dBV levels from -8 to +8 dBV Vn Ro Io(max) Io Ro noise level output impedance output current limiting discharge output current power mute (MUTE = 1) passive standby (STBP = 1) - - 0.03 <0.2 -80 200 -1 1 - - - 300 - - - - % % dBV mA mA -9 -4.5 -8 -3 -7 -1.5 dBV dBV
tuner input signal on zero level - - dBV; note 2 - - -
Power mute outputs: pins MUTEC, MUTEL and MUTER output impedance no mute (MUTE = 0) muting (MUTE = 1); DC load from -1 to +1 mA Audio peak envelope output: pin ENVOUT Vo output voltage tuner input signal at normal level -8 dBV at high level +8 dBV at zero level - dBV at zero level - dBV and maximum volume +15 dB cb Ro Notes 1. THD = 1%, output load with RL = 5 k and CL = 2.2 nF, volume = 3 dB for VCC = 12 V and tuner input level varied. 2. B = 20 Hz to 20 kHz, unweighted. 3. Crosstalk of any line input pair (tuner, CINCH, ext1, ext2, aux and SAP) to any other line input. channel balance output impedance 1.65 4.0 - - -0.11 - 1.8 4.5 - - 0 1 1.96 5.0 0.3 0.35 +0.11 1.5 V V V V V k 50 - 100 15 k
1999 Apr 14
34
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
12 RECORD MODE CHARACTERISTICS VCC = 12 V; Tamb = 25 C; tuner audio input level -8 dBV at f = 1 kHz; auto-calibrated; measured in typical application circuit of Fig.14; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Noise reduction (test 25b) THD total harmonic distortion tuner input signal at normal level -8 dBV high level +8 dBV cb lin channel balance linearity tuner input signal at low level -68 to -8 dBV high level -8 to +8 dBV n tatt trec res(f1) res(f2) res(lpf1) res(lpf2) FM modulator THD fFM(max) fc(acc) fc fc(shift) TC fFM Io(acc) f(acc) IM2 Notes 1. B = 20 Hz to 20 kHz, unweighted. 2. Amplitude of 400 kHz intermodulation product fc(R) and fc(L) compared to amplitude of recording current fc(R) + fc(L). total harmonic distortion maximum FM deviation of clipper carrier frequency accuracy carrier frequency difference carrier frequency shift temperature coefficient fFM = 50 kHz; test 25a and 26a test 25a and 26a auto-calibration fc(R) - fc(L) for NTSC auto-calibration NTSC/PAL system switching - 140 -5 399.2 97 - 0.1 150 0 401.2 100 50 0.2 160 +5 403.2 103 - % kHz kHz kHz kHz ppm/K noise level with respect to signal level attack time recovery time frequency response 300 Hz frequency response 10 kHz audio low-pass filter response 20 kHz audio low-pass filter response 60 kHz tuner input signal level from - to -8 dBV; note 1 -32 7.5 - -30.5 8 -46 5 70 -0.2 3.9 -0.1 -24 -29 8.5 -41 - - +0.3 4.7 +0.5 -12 dB dB dB ms ms dB dB dB dB - - -1 0.1 0.2 0 0.3 1.0 +1 % % dB
in accordance with VHS specification - in accordance with VHS specification - tuner input frequency from 300 to 1000 Hz tuner input frequency from 10 to 1 kHz tuner input frequency from 20 to 1 kHz; test 26b tuner input frequency from 60 to 1 kHz; test 26b -0.7 3.1 -0.5 -
Noise reduction and FM modulator FM deviation 44.5 -1.5 -1 - 50 56.1 kHz
Record output on pin RECOUT output current accuracy carrier mix ratio accuracy IM2 product left and right carrier 1st harmonic left compared to right carrier note 2 0 0 -66 +1.5 +1 - dB dB dB
1999 Apr 14
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Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
13 PLAYBACK MODE CHARACTERISTICS VCC = 12 V; Tamb = 25 C; measured in typical application circuit of Fig.14; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. - - - - - -3 -1 - TYP. MAX. - - - - UNIT pF nV/Hz pA/Hz
Play back input on pins PBIN2 and PBIN1 Ri Ci Vn(i) In(i) Ri Gacc Gbal ct Vi(p-p) B f input resistance input capacitance input noise voltage input noise current 700 35 0.5 2.5
Head mode switch: pin HSMW input impedance with respect to ground 1 2
Head amplifier gain accuracy gain balance head-to-head crosstalk test 8 between pins PBIN1 and PBIN2 between pins PBIN1and PBIN2 0 0 -45 +3 +1 - dB dB dB
HF AGC (test 5) AGC start level (peak-to-peak value) control bandwidth playback mode (HPD = 1); left plus right channel note 1 (f0 - 400 kHz)/f0 (f0 - 150 kHz)/f0 (f0 + 150 kHz)/f0 (f0 + 250 kHz)/f0 (f0 + 250 kHz)/(f0 + 150 kHz) (f0 + 400 kHz)/f0 td(g) f ripple group delay (f0 - 150 kHz) to (f0 + 150 kHz) (f0 - 400 kHz)/f0 (f0 - 250 kHz)/f0 (f0 - 250 kHz)/(f0 - 150 kHz) (f0 1 150 kHz)/f0 (f0 + 150 kHz)/f0 (f0 + 400 kHz)/f0 td(g) ripple group delay (f0 - 150 kHz) to (f0 + 150 kHz) Right channel band-pass filter (test 4) output voltage ratio - - - -9 -9 - - - -17 -12 -5 -6 -30 0.5 -30 -10 -9 - - -20 - dB dB dB dB dB dB s 47 - - -9 -9 - - - - 67 10 -30 -6 -5 -17 -12 - 0.5 94 - -20 - - -12 -9 -30 - mV kHz
Left channel band-pass filter (test 3) output voltage ratio dB dB dB dB dB dB s
1999 Apr 14
36
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Hi-fi detector (bit AUTN) Vth(rms) Vth(acc) td(sw) Vth td(sw) th THD td threshold level (RMS value) accuracy of threshold level switch-on delay playback mode (HPD = 1); left channel carrier 2.4 3.3 0 300 -4 9 4.6 +5 500 -2 14 mV dB s
left channel carrier on pins PBIN1 -5 and PBIN2 carrier to no-carrier 150 -7 5
Hi-fi dropout cancelling (bit DOC) threshold level switch-off delay with respect to threshold level of bit AUTN no-carrier to carrier dB s s s dB s
Head switching noise suppression hold time total harmonic distortion delay sample-and-hold time bit SHH = 0 5 sample-and-hold time bit SHH = 1 7 test 25c; note 2 between HID control signal and hold status fFM = 150 kHz; S/N = 35 dB normal; fFM = 50 kHz maximum; fFM = 150 kHz S/N ct(ch) Vn THD lin res(f1) res(f2) signal-to-noise ratio channel crosstalk fFM = 50 to 0 kHz left or right carrier; fFM = 0 kHz tuner input signal level at - dBV; note 3 tuner input signal level at -6.5 dBV tuner input signal level from -6.5 to -36.5 dBV tuner input frequency from 300 to 1000 Hz tuner input frequency from 10 to 1 kHz - - 6 8 - 0.3 7 9 -73 -
PLL FM demodulator (test 25c) Vi THD sensitivity total harmonic distortion - - - 54 - - - 58 -0.6 -9.2 0.3 0.05 0.2 60 -80 -95 0.05 59.6 +0.4 -7.7 1 0.3 1.5 - - -90 0.2 62 +1.4 -6.2 mV % % dB dB
Noise reduction (test 26c) noise level total harmonic distortion linearity frequency response 300 Hz frequency response 10 kHz dBV % dB dB dB
1999 Apr 14
37
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Envelope output: pin ENVOUT Vo output voltage left channel input signal at 1.6 mV (RMS) 16 mV (RMS) 160 mV (RMS) FM demodulator and noise reduction: pins LINEL and LINER Vo cb Notes 1. Amplitude modulated single carrier signal of 60 mV (RMS) on pin HMSW; for playback mode HPD = 1. Control bandwidth is defined as the modulation frequency at which the amplitude modulation is attenuated with 3 dB by the HF AGC. 2. Sample-and-hold audio distortion is measured using a HID control signal of 500 Hz on pin RMHID, fmod = 10 kHz and fFM = 50 kHz. Audio distortion is measured using a 3 kHz 4th-order low-pass filter. The measured value is corrected with 24 dB in order to calculate the equivalent distortion for the standard NTSC 29.97 Hz HID control signal. 3. B = 20 Hz to 20 kHz, unweighted. output voltage channel balance -10 -1.5 -8 0 -6 +1.5 dBV dB 0.6 2.5 4.2 0.9 2.9 4.7 1.2 3.3 5.0 V V V
1999 Apr 14
38
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ndbook, full pagewidth
1999 Apr 14
AH1 SAP tuner
14 APPLICATION AND TEST INFORMATION
Philips Semiconductors
Audio processor with head amplifier for VHS hi-fi
5V 47 F
RM 10 k
HID 18 k
AF/HF envelope
SDA
SCL
9 to 12 V 47 F 10 nF 2.2 F 39 k (2%) 28
41 envelope output select + playback DCL 39 RM HID DCR LEVEL DETECTOR HF LIMITER
44
42
43
34
27
29
40 100 nF
HI-FI DETECTOR AUTN DROPOUT CANCELING HID
I2C-BUS INTERFACE
SUPPLY
37 head drum AH2 35
HID
HF AGC
standby select
NOISE REDUCTION
DETECTOR W + FM RECTIFIER CCA 26 25 24 10 F 47 F 6.8 nF 2.7 k 33 k 30 31 32 CCA 33 2.7 k 33 k decoder select +1 dB 12 V 10 F 10 F 47 F 6.8 nF 10 F
36 100 nF 10 nF 470 38
playback head amplification, record head current
RM M
1.3 or 1.4 MHz
PLL CCO (1.3 or 1.4 MHz)
NOISE SUPPRESSION AUDIO CLIPPER
5th ORDER AUDIO LPF
COMPRESSOR EXPANDER
23
HF LFP LEVEL DETECTOR HF LIMITER 1.7 or 1.8 MHz PLL CCO (1.7 or 1.8 MHz) NOISE SUPPRESSION AUDIO CLIPPER 5th ORDER AUDIO LPF W + FM
+
DETECTOR RECTIFIER
playback. + record-mute, recording
1 2 3 4 CINCH 5 6 ext1 7 8 ext2 9 10 aux 220 nF (11x) 11 E1L E1R SAP TUL TUR
carrier ratio select, record-mute HEAD AMPLIFIER
COMPRESSOR EXPANDER
HF LFP
FM (DE-)MODULATOR
volume left AUTN output select TUL E1L SAP
19
10 F
39
decoder
+
M
+
L
+ +
M dub
+
M E2L E2R N dub volume right
R
TUR E1R SAP
20 M line select
10 F
N
16 E2L 15
10 F
line envelope output select + record 17 E2R mute L PEAK HOLD DCL VCC R PEAK HOLD DCR 13 M 14 AUTO-MUTE 10 F RFC SAP M 18
10 F
input select
I/O CONTROL
TUL TUR E2L E2R
+ +
M normal input level
normal select
TDA9605H
21 22 12 RF converter mute
Product specification
TDA9605H
I2C-bus control
MGR839
M = mute
10 F
220 nF 3.3 M linear audio 10 F
Fig.14 Application diagram.
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
14.1 RM and HID control signals
TDA9605H
To assure proper input conditions on pin RMHID the RM and HID control signals (see Fig.15) should satisfy the requirements given in Table 39.
handbook, full pagewidth
10 k (5 %) RM HID 18 k (5 %) RMHID
TDA9605H
RM 41 HID
10 k (5 %) RMHID 18 k (5 %)
TDA9605H
41
MGR840
a. HID input only. Fig.15 RMHID input.
b. HID and RM input.
Table 39 Conditions of RM and HID input signal HID INPUT SIGNAL ONLY SIGNAL CONDITIONS HID RM LOW HIGH grounded MIN. 0V 3V - MAX. 1.5 V 5.5 V - CONDITIONS LOW HIGH LOW HIGH 14.2 Reference current resistor MIN. 0V 4.3 V 0V 4.3 V MAX. 0.4 V 5.5 V 0.4 V 5.5 V HID AND RM INPUT SIGNALS
The requirements for the reference current resistor on pin 28 are: * R = 39 k 2% * Temperature coefficient = 50 ppm/C.
1999 Apr 14
40
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
14.3 Setting line output level
TDA9605H
The audio level can be set by selecting the external filter components connected to the emphasis noise reduction pins 24 and 32 (pins EMPHL and EMPHR). Table 40 Component values for setting the line output level LINE OUTPUT LEVEL(1) -4.9 dBV -5.7 dBV -6.4 dBV -7.2 dBV -8.0 dBV -8.8 dBV -9.6 dBV -10.6 dBV -11.4 dBV Note 1. Standard 50 kHz FM deviation at f = 1 kHz. 14.4 Test modes RESISTOR CONNECTED BETWEEN PINS 24 AND 23 47 k 43 k 39 k 36 k 33 k 30 k 27 k 24 k 22 k PINS 32 AND 33 47 k 43 k 39 k 36 k 33 k 30 k 27 k 24 k 22 k RESISTOR IN SERIES WITH CAPACITOR CONNECTED BETWEEN PIN 24 AND GROUND 3.9 k 3.6 k 3.3 k 3.0 k 2.7 k 2.4 k 2.2 k 2.0 k 1.8 k 4.7 nF 5.1 nF 5.6 nF 6.2 nF 6.8 nF 7.5 nF 8.2 nF 9.1 nF 10 nF PIN 32 AND GROUND 3.9 k 3.6 k 3.3 k 3.0 k 2.7 k 2.4 k 2.2 k 2.0 k 1.8 k 4.7 nF 5.1 nF 5.6 nF 6.2 nF 6.8 nF 7.5 nF 8.2 nF 9.1 nF 10 nF
Special test modes are implemented for testing, evaluation and measurement purposes. These test modes are available when bit TEST = 1 and the test select function is enabled via five bits of the select byte (see Table 41). When selecting test modes the normal input level setting is changed as defined by bits NIL3 to NIL0. Calibration may be lost when a not listed test mode is selected.
1999 Apr 14
41
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
Table 41 Test modes for evaluation and measurement purposes TEST HRL NIL3 NIL2 NIL1 NIL0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 0 0 1 MODE test 1 test 2 test 3 test 4 test 5 test 6 test 8 test 10 test 25 DESCRIPTION
TDA9605H
record mode; left channel FM carrier only (1.3 or 1.4 MHz) record mode; right channel FM carrier only (1.7 or 1.8 MHz) playback mode; left channel band-pass filter with HF AGC off; EOS = 1 (test output on pin ENVOUT); notes 1 and 2 playback mode; right channel band-pass filter with HF AGC off; EOS = 1 (test output on pin ENVOUT); notes 1 and 2 playback mode; HF AGC (left channel band-pass filter); EOS = 1 (test output on pin ENVOUT); notes 1 and 2 playback mode; HF AGC (right channel band-pass filter); EOS = 1 (test output on pin ENVOUT); notes 1 and 2 playback mode; head amplifier output signal; EOS = 1 (test output on pin ENVOUT; notes 2 and 3 playback mode; HF envelope of right channel carrier; EOS = 1 (test output on pin ENVOUT) noise reduction and modem; note 4
test 25a left channel FM modulator (left carrier only); record mode; volume setting = -3 dB; test input = line input left test 25b left and right noise reduction (compressor); record mode; output select function = mute; test output = line output test 25c left and right channel FM demodulator; playback mode; output select function = mute; test output = line output 1 1 1 0 1 0 test 26 noise reduction and modem; note 4 test 26a right channel FM modulator (right carrier only); record mode; volume setting = -3 dB; test input = line input right test 26b left and right channel audio lowpass filter; record mode; volume setting = -3 dB; output select function = mute; test input = line input; test output = line output test 26c left and right channel noise reduction (expander); playback mode; volume setting = -3 dB; test input = line input; note 5 Notes 1. This test can be used with a HIGH-level input signal by setting bit HPD = 1; test input signal applied to pin HMSW. 2. Auto-normal is activated (bit AUTN = 1) during the test, i.e. the playback audio signal is not available. 3. The output level on pin ENVOUT shows 6 dB attenuation compared to the internal signal of the head amplifier output. 4. This test connects internal signal lines between the noise reduction and (de-)modulator circuit. The signals found here are not compensated for temperature or tolerance spread and therefore level measurements are only relative. Absolute values are not an indication of the overall performance. Typical audio level of the test inputs and outputs is approximately -6.5 dBV for the standard -8 dBV line level and 50 kHz FM deviation. 5. The expander test requires the auto-normal function to be set inactive; i.e. an FM carrier signal should be available.
1999 Apr 14
42
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
15 INTERNAL CIRCUITRY The indicated DC voltages are given for the record-mute mode in the typical application circuit without audio signal; unless otherwise specified. PIN 1 2 3 4 5 6 7 8 9 10 11 12 SYMBOL SAP TUNL TUNR CINL CINR EXT1L EXT1R EXT2L EXT2R AUXL AUXR RFCAGC 0V
VCC 100 bit RFCM 12 500
MGR850
VOLTAGE 3.8 V
EQUIVALENT CIRCUIT
VCC 57 k 1 to 11 73 k 3.8 V
MGR849
13
RFCOUT
3.8 V
200
VCC
13 230 A 180 k
MGR851
14 15 18
MUTEC MUTEL MUTER
0V
bit MUTE or VCC <7 V 14, 15, 18 100 k
MGR852
16 17 19 20
LINEL LINER DECL DECR
4.5 V (VCCS = 0); 6 V (VCCS = 1)
22.8 k bit VCCS VCC
2.8 k
20 k VCC
bit LOH class AB
100 16, 17, 19, 20
MGR853
1999 Apr 14
43
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
PIN 21
SYMBOL LINOUT
VOLTAGE 4.5 V
EQUIVALENT CIRCUIT
VCC 30 k 3.8 V 96.4 k 17.7 k 200 21 600 A
MGR854
22
LININ
3.8 V
VCC
22 total = 130 k bits NIL2 to NIL0
3.8 V
MGR855
23 33
DCFBL DCFBR
3.8 V
VCC
23, 33
3.8 V
bit AFM
MGR856
24 32
EMPHL EMPHR
3.8 V
240 3.8 V bit AFM
VCC
24, 32
MGR857
25 31
DCL DCR
3.8 V
2.8 k
VCC
25, 31
3.8 V
MGR858
1999 Apr 14
44
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
PIN 26 30
SYMBOL DETL DETR
VOLTAGE 0.7 V
EQUIVALENT CIRCUIT
VCC
26, 30 7.5 k 0.5 V
MGR859
27
GND
0V
27 substrate
MGR860
28 29
Iref Vref
3.8 V
200
VCC
28 3.8 V from reference generator (3.8-a) V bit STBA bit STBP 3.8 V
MGR861
20 k
VCC
29
34
VCC
9 to 12 V
34
VCC
MGR862
1999 Apr 14
45
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
PIN 35 36 37 38
SYMBOL PBIN2 RECOUT PBIN1 HMSW
VOLTAGE 0.7 V; 4.3 V (recording)
VCCH
EQUIVALENT CIRCUIT
playback or record-mute mode signal RM bit AFM bit DOC bit SHH bit DETH
0 V; 4.3 V (recording)
35
35 k
VCC GNDH
36
GNDH 5 VCCH GNDH
35 k 37
VCC
GNDH &
38 & bit HPD GNDH
MGR863
to HF AGC
39
GNDH
0V
39
GNDH
MGR864
40
VCCH
5V
40
VCCH
MGR865
1999 Apr 14
46
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
TDA9605H
PIN 41
SYMBOL RMHID
VOLTAGE 0 to 5 V
VCC
EQUIVALENT CIRCUIT
2.5 V 3 k 41 signal RM
0.8 V 4.05 V signal HID
MGR866
42
SDA
0 or 5 V
275 42 bit ACK (I2C-bus acknowledge)
MGR867
43
SCL
0 or 5 V
275 43
MGR868
44
ENVOUT
0V
40 A 1 k
VCC
44
test modes
MGR869
1999 Apr 14
47
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
16 PACKAGE OUTLINE QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm
TDA9605H
SOT307-2
c
y X
A 33 34 23 22 ZE
e E HE wM bp pin 1 index 44 1 bp D HD wM 11 ZD B vM B vMA 12 detail X A A2 (A 3) Lp L
A1
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2.10 A1 0.25 0.05 A2 1.85 1.65 A3 0.25 bp 0.40 0.20 c 0.25 0.14 D (1) 10.1 9.9 E (1) 10.1 9.9 e 0.8 HD 12.9 12.3 HE 12.9 12.3 L 1.3 Lp 0.95 0.55 v 0.15 w 0.15 y 0.1 Z D (1) Z E (1) 1.2 0.8 1.2 0.8 10 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT307-2 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 97-08-01
1999 Apr 14
48
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
17 SOLDERING 17.1 Introduction to soldering surface mount packages
TDA9605H
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 17.4 Manual soldering
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. 17.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. 17.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1999 Apr 14
49
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
17.5 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, SQFP PLCC(3), SO, SOJ not suitable suitable(2) suitable not recommended(3)(4) not recommended(5) suitable suitable suitable suitable suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes
TDA9605H
REFLOW(1)
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
1999 Apr 14
50
Philips Semiconductors
Product specification
Audio processor with head amplifier for VHS hi-fi
18 DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA9605H
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 19 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 20 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
1999 Apr 14
51
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1999
Internet: http://www.semiconductors.philips.com
SCA63
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/750/01/pp52
Date of release: 1999 Apr 14
Document order number:
9397 750 04687


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